Synchronisation planner¶

For each signal, the delay from the end of the interval a value describes to its stamp lies in a range [lo, hi] against the working reference, and the interval itself is up to y_hi wide.

• Shift each signal by the middle of its delay range. What is left is treated as uniform: spread (hi − lo) / √12. Where in its interval a value's time lies adds y_hi / √12.
• Relative timing error σ = √(Σ spread² + Σ interval²), over all chosen signals, taken as independent.
• Coherent band 0.1325 / σ: the −3 dB frequency of a Gaussian timing blur. Cross-modal structure faster than this is smeared.
• Finest useful grid √12 · σ: a shared time grid finer than this adds no cross-channel information.
• Latency floor max hi (plus the delay a correction removed, for corrected forms): a feature vector at time t can only hold windows that ended this long before t.
• Drift limit σ / |Δ drift|: between clock domains, how long a window can be before drift adds another σ. Signals in one domain share their drift, which cancels.
• Window advice: at least the slowest signal's interval, at least σ / tolerance, at most the drift limit; step by at least the finest grid.

The working reference is SNUADC stamp-model time: the SNUADC sample clock, placed on the recorder PC's timeline by the stamp model (drift and corrections fitted, the signal lost at each correction added back). Every delay in the planner is measured against it. Its own error against the PC is a few milliseconds where the SNUADC's corrections are seen; in recordings that make no SNUADC correction it rests on the port's typical rate and can drift by about ±0.1 s per hour (Long SNUADC recordings with no correction at all). The PC's error against UTC is assumed.