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About 20 ms of signal lost at every SNUADC reset

At each step-mode reset the acquisition pauses for about 20 ms inside the last record before the new timing, and that time is never sampled: 17.7 ms on the sample count (Signal lost at a SNUADC step-mode correction), once the filler sample is counted. Every record still holds 100 samples, so nothing in the file shows it.

Status established: shown on many cases, with a control.
Clocks SNUADC sample clock
Devices SNUADC
Variables ECG lead II (SNUADC), Arterial pressure (SNUADC), Plethysmogram (SNUADC)

What it means

Timed by sample count, every sample after a reset is about 18 ms early. Over a case's one to three resets this adds up, and it biases drift rates estimated from correction sizes by about 3.6%.

What is done about it

The stamp model adds 17.7 ms back at each step-mode reset, at the end of the record that holds the pause; samples inside that record can still be up to about 20 ms late.

Evidence

Study Date Status Summary
Paced ECG as an independent clock 2026-10-17 current Fixed-rate pacing gives a clock the recording chain cannot touch. Timing paced beats on three timelines shows that each SNUADC step-mode correction loses about 18 ms of signal, and that nothing else breaks the sample stream.
Records out of order at SNUADC resets, and where the lost time goes 2026-10-17 current At every SNUADC reset the five records after it are written out of order: two continue the old timing and three start the new. Put back in order, the waveform runs on with no samples missing; the 18–20 ms lost at each reset goes missing inside the last old-timing record, and an extra zero sample follows.
The SNUADC firmware 2026-10-13 current The public SNUADC firmware explains the board's timing: it sends no time stamps, samples on its 16 MHz crystal, loses time rather than bunching samples after a stall, reads its channels one after another, and truncates its values. A predicted fault at the microsecond counter's wrap was not found in the data.
The stamp sawtooth model for SNUADC and BIS 2026-10-12 current Fitting each track's record stamps against its sample count as a drift with corrections (a sawtooth) puts SNUADC and BIS on one timeline without any artefact. Checked against shared bursts, the EEG–ECG timing error falls from about 790 ms on the recorded stamps to 33 ms with one constant per SNUADC mode in the pilot, and 42 ms over the whole release.